000 00595nam a22001697a 4500
003 inkolt
005 20240725162814.0
008 240710s2024 ii ||||| |||| 00| 0 eng d
082 _a621.38
_bMAH
100 _aMahajan, Paksham
_912327
245 _aDifferential power analysis resistant secured s-box circuit using cmos transmission gate logic /
_cPraksham Mahajan.
260 _aHamirpur :
_bNational Institute of Technology,
_c2024
300 _axiv, 73p.
502 _bMaster of Technology
_cEC-NITH
_d2024
720 _aChandel, Rajeevan
_eGuide / Supervisor
942 _cTD
_n0
_xRajesh Pal Patial
_y6
_z Rajesh Pal Patial
999 _c5893
_d5893