000 | 00580nam a22001697a 4500 | ||
---|---|---|---|
003 | inkolt | ||
005 | 20240502113353.0 | ||
008 | 220914s2022 ii ||||| |||| 00| 0 eng d | ||
082 | 2 |
_a621.38 _bGUP |
|
100 | 1 |
_aGupta, Akhlesh _910758 |
|
245 | _aRedundancy eliminated power gating true-single phase-clocked flip-flop for low-power application | ||
260 |
_aHamirpur : _bNational Institute of Technology, Hamirpur _c2022. |
||
300 | _ax, 55p. | ||
502 |
_bMaster of Technology _cEC-NITH _d2022 |
||
720 |
_aRana, Ashwani Kumar _eGuide / Supervisor |
||
942 |
_cTD _n0 _xNeeraj Kumar _y6 _z Rajesh Pal Patial |
||
999 |
_c4800 _d4800 |