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Design and performance analysis of CMOS SRAM cells in 32nm technology node. by Rathour, Ravi. Material type: Text; Format:
print
; Literary form:
Not fiction
Publisher: Hamirpur : National Institute of Technology, 2015Dissertation note: Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2015 Guide / Supervisor: Rana, Ashwani Kumar.; Availability: Items available for loan: Electronics and Communication Engineering (Departmental Library) (1). Location(s): On Display Call number: 621.38 RAT.
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