Design, analysis and optimization of quadruple valued flip flop / Atishay Kaundal.
By: Kaundal, Atishay
Material type:
TextPublisher: Hamirpur : National Institute of Technology, 2024Description: x, 32pDDC classification: 621.38 Dissertation note: Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2024 Guide / Supervisor: Kumar, Gagnesh
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
Thesis or Dissertation
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Central Library On Display | 621.38 KAU (Browse shelf) | Available | TH-2394 |
Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2024
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