Adluri, Rajesh. <br/><br/>
FPGA implementation of VLSI architecture for arithmetic coding. 

 - Hamirpur :  National Institute of Technology,  2011. 
 - viii, 60p. 
<br/><br/>
<br/><br/><label>Index Terms--Genre/Form: </label><br/>Thesis or Dissertation
<br/><br/><label>Dewey Class. No.: </label>621.38  / ADL