Kumar V, Ramesh. <br/><br/>
Design of reconfigurable multipliers for integer and galois field multiplication based on high speed adders. 

 - Hamirpur :  National Institute of Technology,  2010. 
 - ix, 75p. 
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<br/><br/><label>Index Terms--Genre/Form: </label><br/>Thesis or Dissertation
<br/><br/><label>Dewey Class. No.: </label>621.38  / KUM