Puri, Rakhi. <br/><br/>
Design and performance evaluation of low power optimized VLSI adder circuits. 

 - Hamirpur :  National Institute of Technology,  2008. 
 - xvii, 75p. 
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<br/><br/><label>Index Terms--Genre/Form: </label><br/>Thesis or Dissertation
<br/><br/><label>Dewey Class. No.: </label>621.38  / PUR