Differential power analysis resistant secured s-box circuit using cmos transmission gate logic / Praksham Mahajan.

By: Mahajan, Paksham
Material type: TextTextPublisher: Hamirpur : National Institute of Technology, 2024Description: xiv, 73pDDC classification: 621.38 Dissertation note: Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2024 Guide / Supervisor: Chandel, Rajeevan
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Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2024

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