Modeling and analysis of negative capacitance junctionless finfet for low power SRAM applications
By: Shelja
Material type:
TextPublisher: Hamirpur : National Institute of Technology, 2021Description: xxiv, 156pDDC classification: 621.38 Dissertation note: Doctor of Philosophy, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2021 Guide / Supervisor: Rana, Ashwani.K
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
Thesis or Dissertation
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Central Library On Display | 621.38 SHE (Browse shelf) | Available | TH-1192 | |
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Thesis or Dissertation
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Electronics and Communication Engineering (Departmental Library) On Display | 621.38 SHE (Browse shelf) | Available | EC-TR-24 |
Doctor of Philosophy, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2021
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