Design of leakage supressed ternary content addressable memory at 32nm technology node
By: Gupta, Nitin
Material type: TextPublisher: Hamirpur : National Institute of Technology, 2015Description: xiii, 50pGenre/Form: Thesis or Dissertation DDC classification: 621.38 Dissertation note: Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2015 Guide / Supervisor: Kumar, GagneshItem type | Current location | Call number | Status | Date due | Barcode |
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Thesis or Dissertation | Central Library On Display | 621.38 GUP (Browse shelf) | Available | TH-241 | |
Thesis or Dissertation | Electronics and Communication Engineering (Departmental Library) On Display | 621.38 GUP (Browse shelf) | Available | EC-DR-232 |
Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2015
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