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Double- gate fully-depleted silicon on insulator mosfet

By: Borah, Niranjan Jyoti

Material type: Text

TextPublisher: Hamirpur : National Institute of Technology, 2014Description: x, 72pGenre/Form: Thesis or Dissertation DDC classification: 621.38 Dissertation note: Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2014 Guide / Supervisor: Kumar, Gagnesh

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Item type	Current location	Call number	Status	Date due	Barcode
Thesis or Dissertation	Central Library On Display	621.38 BOR (Browse shelf)	Available		TH-145
Thesis or Dissertation	Electronics and Communication Engineering (Departmental Library) On Display	621.38 BOR (Browse shelf)	Available		EC-DR-186

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Previous	621.38 BHA Resource allocation using noma in 5g networks	621.38 BHA Deep learning method for classification of schizophrenia using multivariate eeg signals	621.38 BIL On packet throughput in cognitive radio under primary delay constraints	621.38 BOR Double- gate fully-depleted silicon on insulator mosfet	621.38 CHA Design and analysis of high speed, low power CMOS tapered buffer for VLSI application.	621.38 CHA Design and performance analysis of voltage conlrol oscillator.	621.38 CHA Design and analysis of low power CMOS GDI adders and multipliers.	Next

Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2014

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कोहा @ रा.प्रौ.सं.ह. / KOHA @ NITH

Double- gate fully-depleted silicon on insulator mosfet

By: Borah, Niranjan Jyoti

Browsing Electronics and Communication Engineering (Departmental Library) shelves, Shelving location: On Display Close shelf browser