Design and analysis of low power CMOS GDI adders and multipliers.
By: Chaddha, Kiran Kumar
Material type:
TextPublisher: Hamirpur : National Institute of Technology, 2010Description: xiv, 72pGenre/Form: Thesis or Dissertation DDC classification: 621.38 Dissertation note: Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2010 Guide / Supervisor: Rajeevan, Chandel.
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
Thesis or Dissertation
|
Electronics and Communication Engineering (Departmental Library) On Display | 621.38 CHA (Browse shelf) | Available | EC-DR-41 |
Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2010
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