Design and analysis of low phase noise CMOS pll frequency synthesizer.
By: Sharma, Ankit
Material type:
TextPublisher: Hamirpur : National Institute of Technology, 2008Description: x, 80pGenre/Form: Thesis or Dissertation DDC classification: 621.38 Dissertation note: Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2008 Guide / Supervisor: Rao, B.J.Rana, Ashwani K.
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
Thesis or Dissertation
|
Electronics and Communication Engineering (Departmental Library) On Display | 621.38 SHA (Browse shelf) | Available | EC-DR-06 |
Master of Technology, Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. 2008
There are no comments on this title.