| 000 -LEADER |
|---|
| fixed length control field |
00553nam a22001697a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
inkolt |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20241017152738.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
241017s2024 ii ||||| |||| 00| 0 eng d |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.38 |
| Item number |
SIN |
| 100 ## - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Singh, Dilip |
| 245 ## - TITLE STATEMENT |
|---|
| Title |
VLSI design and hardware acceleration of speech coding algorithms using fgpa / |
| Statement of responsibility, etc. |
Dilip Singh |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Hamirpur : |
| Name of publisher, distributor, etc. |
National Institute of Technology, |
| Date of publication, distribution, etc. |
2024 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xxviii, 177p. |
| 502 ## - DISSERTATION NOTE |
|---|
| Degree type |
Doctor of Philosophy, |
| Name of granting institution |
Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005. |
| Year degree granted |
2024 |
| 720 ## - ADDED ENTRY--UNCONTROLLED NAME |
|---|
| Name |
Chandel, Rajeevan |
| Relator term |
Guide / Supervisor |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
Thesis or Dissertation |
| Suppress in OPAC |
No |
| Entered by |
Rajesh Pal Patial |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| -- |
Rajesh Pal Patial |