Design of ultra low power sram using adiabatic logic (Record no. 5488)

000 -LEADER
fixed length control field 00523nam a22001697a 4500
003 - CONTROL NUMBER IDENTIFIER
control field inkolt
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240513164023.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230717s2023 ii ||||| |||| 00| 0 eng d
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.38
Item number SHA
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Sharma, Shubham
245 ## - TITLE STATEMENT
Title Design of ultra low power sram using adiabatic logic
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. Hamirpur :
Name of publisher, distributor, etc. National Institute of Technology,
Date of publication, distribution, etc. 2023.
300 ## - PHYSICAL DESCRIPTION
Extent 49p.
502 ## - DISSERTATION NOTE
Degree type Master of Technology,
Year degree granted 2023
Name of granting institution Department of Electronics and Communication Engineering, National Institute of Technology Hamirpur, Himachal Pradesh, India - 177005.
720 ## - ADDED ENTRY--UNCONTROLLED NAME
Name Rana, Ashwani
Relator term Guide / Supervisor
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Thesis or Dissertation
Suppress in OPAC No
Entered by Rajesh Pal Patial
942 ## - ADDED ENTRY ELEMENTS (KOHA)
-- Rajesh Pal Patial
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Permanent Location Current Location Shelving location Date acquired Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
          Central Library Central Library On Display 2023-07-17   621.38 SHA TH-2029 2023-07-17 2023-07-17 Thesis or Dissertation
Supported by Central Library, NIT Hamirpur
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